Motorola DSP56305 Instrukcja Użytkownika Strona 91

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7-6 Optimizing DSP56300/DSP56600 Applications MOTOROLA
Compact Opcode Use
Addressing Modes
7.2.2 Short Addressing Mode
The lower portion (first 64 locations 0–63) of data memory can be
accessed by special short addressing modes that can specify the
location as part of the opcode, contrary to other locations where a
second instruction word is required. Example:
move X:5,x0
This instruction executes in 1 clock cycle. This makes it possible to
use the lower portion of the data memory as general purpose
registers without a significant increase in code length.
7.2.3 Short Immediate Mode
There are some MOVE instructions that permit the specification of
immediate data numbers in a small range so that a second word is
not required. Example:
move #5,r0
This instruction executes in one clock cycle. This makes it possible
to initialize registers without executing 2-word, 2-cycle instructions.
7.2.4 Short Immediate Operands
There are also some arithmetic instructions that defines a short
immediate operand. Example:
move #>$8000,a ;the “>” is the ‘force long’
move #>$0075,r0 ;assembler directive
xor #>$0003,a
This example can be optimized by replacing all the instructions by
their short immediate operand versions:
move #<$80,a
move #<$75,r0
xor #<$03,a
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