Motorola DSP56800 Dokumentacja

DSP56800 Hardware Interface TechniquesFreescaleSemiconductor Application NoteOrder by AN1920/DFreescale Order NumberRev. 0, 06/2001© Motorola, Inc., 2

10 DSP56800 Hardware Interface Techniques System FunctionsThis section is dedicated to testing and debugging retention, but specifically through the

Memory Interfaces DSP56800 Hardware Interface Techniques 11This section includes aspects of the JTAG implementation specific to the DSP56F801 through

12 DSP56800 Hardware Interface Techniques Memory InterfacesIf EXTBOOT is asserted low during reset, then Mode 0A: boot is automatically entered when

Memory Interfaces DSP56800 Hardware Interface Techniques 13The MODA and MODB pins are sampled as the DSP56824 leaves the Reset state, and the initial

14 DSP56800 Hardware Interface Techniques Memory Interfaces3.1.7 Normal Expanded Mode (Mode 2) In the Normal Expanded mode (Mode 2), all 32,768 word

Memory Interfaces DSP56800 Hardware Interface Techniques 15Then: Top = 1/50e6 = 20nsWS = 0 tACC = Top*0 + (Top – 11.5) = 8.5nsMany SRAM devices

16 DSP56800 Hardware Interface Techniques Memory Interfaces3.2.3.1 Memory Paging Using GPIOFigure 14 below shows a simple technique to select diffe

Memory Interfaces DSP56800 Hardware Interface Techniques 17Initialize GPIO control registersFor a page transition:i) Set GPIO to zeroii) Execute exte

18 DSP56800 Hardware Interface Techniques Peripheral Interfaces4. Peripheral InterfacesThe following sections provide example interfaces to DSP5680

Peripheral Interfaces DSP56800 Hardware Interface Techniques 19Figure 17. CAN Interface4.3 Codec Interface (DSP56824)The DSP56824EVM provides a 13-

2 DSP56800 Hardware Interface Techniques System FunctionsFigure 1. Schematic Diagram of the Power SupplyThe DSP56800 devices include both analog and

20 DSP56800 Hardware Interface Techniques Peripheral InterfacesFigure 18. Block Diagram of the SSI CODEC Interface 3.4 DAC Interface using SPI PortTh

Peripheral Interfaces DSP56800 Hardware Interface Techniques 21Figure 19. Serial 10-bit, 4-Channel D/A Converter4.4 PWM InterfaceThe sections below

22 DSP56800 Hardware Interface Techniques Peripheral Interfaces4.5 Motor Protection LogicThe DSP56F807EVM contains two UNI-3 connectors that interf

Peripheral Interfaces DSP56800 Hardware Interface Techniques 23Figure 22. DC-Bus Over-Voltage and Phase Over-Current Detection CircuitsTable 6: FAULT

24 DSP56800 Hardware Interface Techniques Peripheral Interfaces4.6 SCI InterfaceAn example of an SCI interface is that provided by the DSP56F807EVM

Conclusion DSP56800 Hardware Interface Techniques 254.7 Quadrature Decoder InterfaceThe DSP56F807EVM board contains a Primary and Secondary Quadrat

26 DSP56800 Hardware Interface Techniques References6. References1. Howard W. Johnson and Martin Graham, “High-Speed Digital Design”, PTR Prentice-

NOTES: DSP56800 Hardware Interface Techniques 27 NOTES: ___________________________________________________________________________________________

AN1920/D Freescale Semiconductor, I Freescale Semiconductor, Inc.For More Information On This Produ

System Functions DSP56800 Hardware Interface Techniques 39. Consider all device loads as well as parasitic capacitance due to PCB traces when calcula

4 DSP56800 Hardware Interface Techniques System Functions2.2.2 External Clock SourceThe recommended method of connecting an external clock is given

System Functions DSP56800 Hardware Interface Techniques 5where C depends on die area and output capacitive loading as described below, VDD is the dig

6 DSP56800 Hardware Interface Techniques System FunctionsFigure 6. IDDA vs. VDDA2.3.4 Variation with Respect to Operating FrequencyThe digital suppl

System Functions DSP56800 Hardware Interface Techniques 72.3.5 Variation with Respect to Output Loading Output loading influences supply current req

8 DSP56800 Hardware Interface Techniques System FunctionsBy default, the pulse shaper functions force internal reset signals to be a minimum of 32 os

System Functions DSP56800 Hardware Interface Techniques 92.4.3 GPIO Pin Configured as Interrupt InterfaceAn example interface to GPIO pins found on