Motorola MVME2400 Series Instrukcja Obsługi Pobierz pdf (Strona 113)

ENV - Set Environment

http://www.mcg.mot.com/literature 6-11

ROMFAL setting is $00; the highest allowable is $1F. The value to

enter depends on processor speed; refer to Chapter 1 or Appendix B

for appropriate values. The default value varies according to the

system’s bus clock speed.

Note ROM First Access Length is not applicable to the

MVME2400. The configured value is ignored by PPCBug.

ROM Next Access Length (0 - 15) = 0?

The value programmed into the“ROMNAL” field (Memory Control

Configuration Register 8: bits 28-31) to represent wait states in access

time for nibble (or burst) mode ROM accesses. The lowest allowable

ROMNAL setting is $0; the highest allowable is $F. The value to enter

depends on processor speed; refer to Chapter 1 or Appendix B for

appropriate values. The default value varies according to the system’s

bus clock speed.

Note ROM Next Access Length is not applicable to the

MVME2400. The configured value is ignored by PPCBug.

DRAM Parity Enable [On-Detection/Always/Never - O/A/N] = O?

Note This parameter (above) also applies to enabling ECC for

DRAM.

L2 Cache Parity Enable [On-Detection/Always/Never - O/A/N] = O?

PCI Interrupts Route Control Registers (PIRQ0/1/2/3) = 0A0B0E0F?

DRAM parity is enabled upon detection. (Default)

DRAM parity is always enabled.

DRAM parity is never enabled.

L2 Cache parity is enabled upon detection. (Default)

L2 Cache parity is always enabled.

L2 Cache parity is never enabled.

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Motorola MVME2400 Series Instrukcja Obsługi Strona 113