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Freescale Semiconductor

Technical Summary

MPC5200TS

Rev. 3, 08/2004

MPC5200 Microprocessor

Technical Summary

The MPC5200 is a highly integrated, cost-effective, 760 MIPS embedded PowerPC® processor that

operates at just one watt at 400 MHz. It offers integrated Ethernet, USB, CAN, Serial, I

C, I

S, SPI, AC97

CODEC interface, J1850, ATA, and PCI. System throughput is enhanced by a BestComm™ intelligent

DMA unit that significantly off loads the processor core from routine I/O tasks. The 400 MHz MPC603e

core processes 760 Dhrystone 2.1 MIPS and is further augmented by an on-chip double-precision Floating

Point Unit (FPU). An integrated Double Data Rate (DDR) memory controller further boosts data

movement. This combination of I/O, processing power, and data throughput enhancements makes the

MPC5200 well suited for telematics, gateways, industrial control, Internet-access devices, video detection

and processing, and electronic/medical instrumentation.

Figure 1. MPC5200 Block Diagram

XL Bus

PowerPC 603e Core

16K

ICache

32 Entry

MMU

16K

DCache

32 Entry

MMU

FPU

Embedded

PowerPC 603e

Core

With double

precision FPU

16K

ICache

32 Entry

MMU

16K

DCache

32 Entry

MMU

IPBI

PCI Controller

ROM/SRAM

ATA/IDE Host

Controller

JTAG

PCI Controller

ROM/SRAM

ATA/IDE Host

Controller

JTAG

PSC1

PSC2

PSC3

PSC1

PSC2

PSC3

SPI

J1850

BDLC-D

SPI

10/100

BaseT

I2C

(Two)

CAN 2.0

A/B

(Two)

Memory

Controller

(DRAM)

USB

(Two)

Memory

Controller

DDR or

SDR

SDRAM

Systems Integration

Unit

System Functions

Real Time clock

Chip Selects (6)

Interrupt Control

Systems Integration

Unit

System Functions

Real Time clock

Chip Selects (8)

Interrupt Control

USB

(Two)

PSC4

PSC5

PSC6

PSC5

PSC6

C Bus

IP Bus

GPIO

16K

SRAM

BestComm

Intelligent DMA

Unit

Clock/Reset

Generation

XL Bus

PowerPC 603e Core

16K

ICache

32 Entry

MMU

16K

DCache

32 Entry

MMU

FPU

Embedded

PowerPC 603e

Core

With double

precision FPU

16K

ICache

32 Entry

MMU

16K

DCache

32 Entry

MMU

PowerPC 603e Core

16K

ICache

32 Entry

MMU

16K

DCache

32 Entry

MMU

FPU

Embedded

PowerPC 603e

Core

With double

precision FPU

16K

ICache

32 Entry

MMU

16K

DCache

32 Entry

MMU

IPBI

PCI Controller

ROM/SRAM

ATA/IDE Host

Controller

JTAG

PCI Controller

ROM/SRAM

ATA/IDE Host

Controller

JTAG

PCI Controller

ROM/SRAM

ATA/IDE Host

Controller

JTAG

PCI Controller

ROM/SRAM

ATA/IDE Host

Controller

JTAG

PSC1

PSC2

PSC3

PSC1

PSC2

PSC3

SPI

J1850

BDLC-D

SPI

10/100

BaseT

I2C

(Two)

CAN 2.0

A/B

(Two)

Memory

Controller

(DRAM)

USB

(Two)

Memory

Controller

DDR or

SDR

SDRAM

Systems Integration

Unit

System Functions

Real Time clock

Chip Selects (6)

Interrupt Control

Systems Integration

Unit

System Functions

Real Time clock

Chip Selects (8)

Interrupt Control

Systems Integration

Unit

System Functions

Real Time clock

Chip Selects (6)

Interrupt Control

Systems Integration

Unit

System Functions

Real Time clock

Chip Selects (8)

Interrupt Control

USB

(Two)

PSC4

PSC5

PSC6

PSC5

PSC6

C Bus

IP Bus

GPIO

16K

SRAM

BestComm

Intelligent DMA

Unit

Clock/Reset

Generation

GPIO

16K

SRAM

BestComm

Intelligent DMA

Unit

Clock/Reset

Generation

1 2 3 4 5 6 ... 11 12

Podsumowanie treści

Strona 1 - Intelligent DMA

Strona 2 - 1 Key Features

MPC5200 Microprocessor Technical Summary, Rev. 3Power ManagementFreescale Semiconductor10options present address and data on the bus simultaneously (n

Strona 3 - Freescale Semiconductor 3

More InformationMPC5200 Microprocessor Technical Summary, Rev. 3Freescale Semiconductor 1120 More InformationAccess for additional MPC5200 Information

Strona 4 - 3 Architecture Overview

MPC5200TSRev. 3, 08/2004How to Reach Us:Home Page:www.freescale.comE-mail:[email protected]/Europe or Locations Not Listed:Freescale Semiconduc

Strona 5 - Freescale Semiconductor 5

MPC5200 Microprocessor Technical Summary, Rev. 3Key FeaturesFreescale Semiconductor2With the success of the MPC5200 in the automotive market, other ma

Strona 6 - 5 BestComm DMA I/O Subsystem

Key FeaturesMPC5200 Microprocessor Technical Summary, Rev. 3Freescale Semiconductor 3• Multiplexed data access using up to 32 bit data with 25 bit add

Strona 7 - 7 10/100 BaseT Ethernet

MPC5200 Microprocessor Technical Summary, Rev. 3Physical CharacteristicsFreescale Semiconductor4• Interrupt controller— Four external interrupt reques

Strona 8 - 11 System Level Interfaces

Embedded PowerPC Processor CoreMPC5200 Microprocessor Technical Summary, Rev. 3Freescale Semiconductor 5electronic/medical instrumentation. The part h

Strona 9 - Freescale Semiconductor 9

MPC5200 Microprocessor Technical Summary, Rev. 3BestComm DMA I/O SubsystemFreescale Semiconductor6Enhancements to the standard MPC603e core include:•

Strona 10 - Power-on

10/100 BaseT EthernetMPC5200 Microprocessor Technical Summary, Rev. 3Freescale Semiconductor 7Figure 2. Example MPC5200 Based System Block Diagram7 10

Strona 11 - 20 More Information

MPC5200 Microprocessor Technical Summary, Rev. 32C (Inter Integrated Circuit)Freescale Semiconductor882C (Inter Integrated Circuit)Contains two separa

Strona 12 - How to Reach Us:

Dual FSCAN (Freescale Scalable Controller Area Network)MPC5200 Microprocessor Technical Summary, Rev. 3Freescale Semiconductor 912 Dual MSCAN (Freesca

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